Sequential Circuit Design for Radiation Hardened Multiple Voltage Integrated Circuits

This technology provides a new radiation hardened latch design that is very SEU (single-event upset) and SET (single event transient effects) immune. Included is a master-slave flip-flop design based on the latch. The design uses substantially lower power (about 50%) than a conventional design when operating at a single power supply voltage. Key to the design is that it allows voltage level shifting between blocks operating at different voltages with essentially no additional circuitry (the level-shifting function is intrinsic to the latch) which enables ~80% power savings over a conventional latch when operated with logic at a low voltage and the latch at a high voltage (the high voltage is required to maintain SEE (single even effects) hardness).