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Piezoelectric Voltage Transformer For Low Voltage Transistors


Technology Description: Power consumption is increasingly critical for modern electronics. In the past transistor voltage reduced with shrinking size but in recent years the voltage scaling has stopped. At the end of the transistor roadmap the operating voltage is projected to be reaching just 0.4 V. To reduce the voltage below this floor value the transistor needs to be reinvented. To help overcome these challenges investigators at UC Berkeley have developed unique techniques and devices that could break through the voltage floor significantly reducing chip operating voltage by several times and improve power consumption by at least an order of magnitude. The results offer a simple approach for preparing nanoscale piezoelectric voltage transformers that can be fabricated with each individual transistor for revolutionary advances in low-voltage transistor technologies. Applications: 1) Integrated circuits (ICs) 2) Embedded devices 3) Mobile phones 4) Electro-optic modulators (EOM) 5) Complementary metal oxide semiconductors (CMOS)


1) Estimated 10x power reduction (3x operating voltage reduction) for certain ICs 2) Leverages industry standard semiconductor and electronic platforms 3) Overcomes architecture challenges associated with voltage downscaling 4) Scalable for tightly-controlled voltage and density needs 5) Enables transistors with steep subthreshold swings less than thermionic limit

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