This invention is an enhancement of a voltage-controlled oscillator (VCO) realized using a CMOS fabrication process. The purpose of which is to reduce the oscillator’s sensitivity to perturbations in the supply voltage as such perturbations lead to excess jitter in the VCO output. The fundamental principle of the invention is to insert compensation circuitry in parallel with each stage of the CML-based ring oscillator. This compensation circuitry exhibits a dependence on the supply voltage that is the opposite of that of the stage thereby minimizing the frequency variation in the presence of supply perturbations. Internal and external noise can cause jitter or deviation from true periodicity in a Voltage Controlled Oscillator (VCO). Low jitter in the VCO output is crucial to proper signal integrity as excess jitter in the VCO output increases the bit error-rate of the system in which it is implemented. In the past techniques to reduce a VCO’s sensitivity to the perturbations have involved employing an additional dedicated power supply that provides a very clean supply voltage or adding extra regulator circuitry such as a low drop-out regulator which consumes considerable extra power. This invention reduces jitter and minimizes frequency variation without requiring either a dedicated power supply or extra regulator circuitry. Applications: For use in communication IC (integrated circuit) chip products. State Of Development: A prototype has been built and tested.
Can suppress the supply noise-induced periodic jitter and minimize the frequency variation of the VCO without requiring a dedicated clean power supply or extra regulator circuitry.